CVE-2024-5660

The Hardware Page Aggregation (HPA) mechanism is used to combine multiple small memory pages into larger blocks to optimize address translation performance. When combined with Stage-1 and/or Stage-2 translation, applied in virtualized environments to isolate guest memory from the host, HPA can be exploited in a way that bypasses Stage-2 verification or GPT protection. Granule Protection Table (GPT) is a mechanism protecting specific memory areas from access at lower privilege levels, such as the normal world of the operating system. Improper interaction of HPA with these translation mechanisms allows access to memory areas that should be protected.

An attacker can gain unauthorized access to protected memory areas, potentially compromising the confidentiality, integrity, and availability of data, including data processed by the hypervisor or Trusted Execution Environment (TEE). This could lead to breaking virtual machine isolation or bypassing system security mechanisms.

Apply patches available from the manufacturer according to references published by Arm Security Center at https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660. OEM device manufacturers based on the mentioned cores should provide appropriate firmware updates. Monitor security communications from operating system vendors and virtualization platform providers utilizing these processors.

Arm processors: Cortex-A77, Cortex-A78, Cortex-A78C, Cortex-A78AE, Cortex-A710, Cortex-X1, Cortex-X1C, Cortex-X2, Cortex-X3, Cortex-X4, Cortex-X925, Neoverse V1, Neoverse V2, Neoverse V3, Neoverse V3AE, Neoverse N2 — specific firmware versions indicated in manufacturer references